Contents|Index|Previous|Next
SPARC
dependent features
See
the following documentation for this architecture’s features and options
for the assembler.
Options
for SPARC
The
SPARC chip family includes several successive levels (or other variants)
of chip, using the same core instruction set, but including a few additional
instructions at each level.
By
default, as
assumes the core instruction set (SPARC v6), but “bumps” the architecture
level as needed; it switches to successively higher architectures as it
encounters instructions that only exist in the higher levels.
If
not configured for SPARC v9 (sparc64-*-*),
as will not bump passed sparclite
by default, an option must be passed to enable the v9 instructions.
as
treats sparclite
as being compatible with v8, unless an architecture is explicitly requested.
SPARC v9 is always incompatible with sparclite.
Floating
point for SPARC
The
SPARC uses IEEE floating-point numbers.
Machine
directives for SPARC
The
SPARC version of as
supports the following additional machine directives.
.align
This must be followed by
the desired alignment in bytes.
.common
This must be followed by
a symbol name, a positive number, and bss.
This behaves somewhat like .comm,
but the syntax is different.
.half
This is functionally identical
to .short.
.proc
This directive is ignored.
Any text following it on the same line is also ignored.
.reserve
This must be followed by
a symbol name, a positive number, and bss.
This behaves somewhat like .lcomm,
but the syntax is different.
.seg
This must be followed by
"text",
"data",
or "data1" directive
declarations. It behaves like .text,
.data,
or .data 1 directives.
.skip
This is functionally identical
to the .space
directive.
.word
On the SPARC, the .word
directive produces 32 bit values, instead of the 16 bit values it produces
on many other machines.
.xword
On the SPARC V9 processor,
the .xword
directive produces 64 bit values.
Top|Contents|Index|Previous|Next