The following documentation discusses Intel i960’s options for the assembler.
-ACA is equivalent to -ACA_A; -AKC is equivalent to -AMC.
Synonyms are provided for compatibility with other tools.
If you do not specify any of these options, as generates code for any instruction or feature that is supported by some version of the 960 (even if this means mixing architectures!).
In principle, as attempts to deduce the minimal sufficient processor type if none is specified; depending on the object code format, the processor type may be recorded in the object file.
If it is critical that the as output match a specific architecture, specify that architecture explicitly.
-b
A table of every such Label is also generated, so that the external postprocessor gbr960 (supplied by Intel) can locate all the counters. This table is always labeled __BRANCH_TABLE__; this is a local symbol to permit collecting statistics for many separate object files. The table is word aligned, and begins with a two-word header. The first word, initialized to 0, is used in maintaining linked lists of branch tables. The second word is a count of the number of entries in the table, which follow immediately: each is a word, pointing to one of the labels illustrated in the previous example.
| *NEXT | COUNT: N | *BRLAB 1 | ... | *BRLAB N |
| _BRANCH_TABLE_ layout |
-no-relax
as generates IEEE floating-point numbers for the directives .float, .double, .extended, and .single.
.leafproc call-lab, bal-lab
A .leafproc declaration is meant for use in conjunction with the optimized call instruction callj; the directive records the data needed later to choose between converting the callj into a bal or a call.
call-lab is optional; if only one argument is present, or if the two arguments are identical, the single argument is assumed to be the bal entry point.
.sysproc name, index
Both arguments are required; index must be between 0 and 31 (inclusive).
All Intel 960 machine instructions are supported; see Options for i960 for a discussion of selecting the instruction subset for a particular 960 architecture. Some opcodes are processed beyond simply emitting a single corresponding instruction: callj, and compare-and-branch or compare-and-jump instructions with target displacements larger than 13 bits.
You can write callj to have the assembler or the linker determine the most appropriate form of subroutine call: call, bal, or calls. If the assembly source contains enough information—a .leafproc or .sysproc directive defining the operand—then as translates the callj; if not, it simply emits the callj, leaving it for the linker to resolve.
The 960 architectures provide combined compare-and-branch instructions that permit you to store the branch target in the lower 13 bits of the instruction word itself. However, if you specify a branch target far enough away that its address won’t fit in 13 bits, the assembler can either issue an error, or convert your compare-and-branch instruction into separate instructions to do the compare and the branch. Whether as gives an error or expands the instruction depends on two choices you can make: whether you use the -no-relax option, and whether you use a “compare and branch” instruction or a “compare and jump” instruction. The “jump” instructions are always expanded if necessary; the “branch” instructions are expanded when necessary unless you specify -no-relax—in which case as gives an error instead.
The following example shows the compare-and-branch instructions, their “jump” variants, and the instruction pairs into which they may expand.